ELE172: DIGITAL LOGIC


Department of Electrical Engineering
University of Southern Maine

Instructor: Mariusz Jankowski
Office: 127 John Mitchell Center
Office hours:  
Telephone: (207) 780-5580
E-mail: mjankowski@usm.maine.edu
Course Description: Introduction to the design of binary logic circuits. Combinatorial and sequential logic systems. Design with SSI, MSI devices and PLDs. Registers, counters and RAMs. The algorithmic state machine (ASM). Lecture: 3hrs, Labs: 2hrs, Credits: 4. Design Credits: 4.

Course Objectives:  

  • To learn to analyze and design simple combinational and sequential digital logic circuits
  • To learn to realize simple combinational and sequential digital logic circuits using discrete components and simple programmable logic devices

Course Outcomes:  

  • Students will be familiar with the axioms of Boolean algebra and will understand the role they play in the theory of of digital logic circuits
  • Students will be able to simplify logic expressions using algebra and Karnaugh maps
  • Students will be able to design and build circuits from functional descriptions
  • Students will understand the principles of operation of first-generation programmable logic devices
  • Students will be able to build and test a circuit given a system of defining equations
  • Students will be able to measure circuit inputs and outputs using oscilloscopes and logic analyzers

 

Laboratories: This course includes six laboratory experiments and two projects/competitions. You will have the opportunity to design, build and test a number of digital logic circuits using modern equipment and computer software.

Syllabus

Week

Topics

Reading
1 Introduction
Number systems and base conversions
Binary arithmetic
1.1,1.3
1.2,1.4
2 Boolean algebra
Switching functions and circuits
Analysis and synthesis of combinational circuits 		2.1
2.2-3
2.4-5
3 Simplification of switching functions
Karnaugh Maps
Simplification using K-maps 		3.1-2
3.3-4
3.5-7
4 Combinational circuit design examples:
Binary arithmetic circuits
Arithmetic logic unit
4.6
4.8
5 Standard MSI devices 4.1-5
6 Programmable logic devices: PROMs, PALs 5.4-5
7 Design examples None
8 Sequential logic circuit models
Memory devices: latches, flip-flops
Rapid prototyping 		6.1
6.2-4
6.5
9 Standard MSI devices:
Shift register
Synchronous/asynchronous binary counters
7.1-2
7.3
10,11 Sequential circuit models: Moore and Mealy
Sequential circuit analysis
Design of synchronous sequential logic circuits
Incompletely specified circuits
 8.1 8.2
8.3
8.4
12,13 Finite state machine design:
Algorithmic state machine,
One-hot method
8.3.5
8.3.6
14 Design examples None


Textbook: V.P. Nelson, et. al., Digital Logic Circuit Analysis & Design, Prentice Hall, 1995.

Tentative Grading Policy: The final letter grade will be based on a cumulative point total computed according to the following approximate weighting schedule - final 30%, mid-semester exams 30%, laboratory 40%.

To help you study and prepare for the exams, see the accompanying list of review topics and suggested homework problems. The use of computer aided design software from Lattice Semiconductor will be required.

 

 

 

If you need course adaptations or accommodations because of a disability please contact the Office of Academic Support for Students with Disabilities, 237 Luther Bonney Hall, 780-4706.